TSN Lead
TSN Lead, NASA JPL
Rob Donnelly is the Time-Sensitive Networking Lead for the High Performance Spaceflight Computing at NASA’s Jet Propulsion Laboratory. Previously, Rob was the FPGA verification lead for the Mars 2020 Lander Vision System which successfully guided the Perseverance rover to a safe landing at the most hazardous Mars landing site to date. Prior to his work at JPL, Rob performed design and verification for Ethernet and Fibre Channel ASICs.
Bill Jacobs
Chief Architect, US Army CPE Aviation
Mr. Bill Jacobs is currently the Chief Architect for the U.S. Army Capability Program Executive (CPE), Aviation. Prior to his current assignment, Mr Jacobs was the architect for the Future Attack Reconnaissance Aircraft (FARA) and responsible for the development and execution of the FARA Modular Open Systems Approach (MOSA) and the Open Systems Verification Demonstration (OSVD) methodology. He has held a variety of technical positions in both CPE-Aviation and DEVCOM Aviation and Missile Center (AvMC) organizations. Mr. Jacobs has a Bachelors in Aerospace Engineering from San Diego State University and a Masters in Systems Engineering from the Naval Post Graduate School
Hubert Lambers
Research Engineer, AIRBUS Operations
Hubert Lambers is research engineer at Airbus Operations. He is responsible for the development of future aircraft real time networks as part of the Cabin & Cargo Electronics Pre-Development group. He has two decades experience in semiconductor development and works on aerospace electronics hardware and software development for 13 years. Hubert received his diploma degree in electrical engineering from the Gottfried Wilhelm Leibniz University Hannover, Germany.
Leonard Elliott
Technical Specialist,DEVCOM – Ground Vehicle Systems Center
Mr. Elliott has been an electrical engineer in the Combat Capabilities Development Command (DEVCOM) Ground Vehicle System Center (GVSC) Vehicle Electronics & Architecture (VEA) Division since September 2010. He is currently the Technical Specialist for the Embedded Systems and Software Branch and has led GVSC’s effort to mature and develop software and networking aspects of the PEO-GCS Common Infrastructure Architecture (GCIA). He supports research and development in the areas of middleware, open system architectures, and safe/secure embedded systems. Mr. Elliott is a Certified Information System Security Professional (CISSP), holds a B.S. degree in Electrical and Computer Engineering from the University of Massachusetts Amherst, and an M.S. in Electrical and Computer Engineering from Worcester Polytechnic Institute.
Tanuman Bhaduri
Prodcut Manager, Keysight
Tanuman is working with Keysight Technologies as a Product Manager focused on AVB and TSN technologies. Tanuman is associated with Network Test Industry for over 15 years and holds multiple patents on Network Verification & Validation strategies. Tanuman holds a Master of Science degree from University of Kolkata. He is based out of Keysight’s R&D Center in Kolkata, India
Dave Cavalcanti
Principal Engineer, Intel Corporation
Dave Cavalcanti is a Principal Engineer at Intel Corporation with extensive experience in distributed networked systems, wireless connectivity, industry standards and ecosystems. He also serves as President of the Avnu Alliance, an industry forum driving standards and certification programs to enable deterministic performance and Time Sensitive Networking (TSN) across Ethernet/Wi-Fi/5G. He received a PhD in Computer Science and Engineering in 2006 from the University of Cincinnati. He has published over 50 peer-reviewed papers and holds 125 granted patents. He served in several leadership positions in IEEE conferences and publications.
Dr. Jean-Pierre de la Croix
NASA JPL
Dr. Jean-Pierre de la Croix is a Robotics Systems Engineer in the Multi-Agent Robotics group at the Jet Propulsion Laboratory. He joined JPL after completing a Ph.D. in Electrical & Computer Engineering at the Georgia Institute of Technology in 2015. His research focused on new control techniques for large-scale robotic systems, such that humans can easily and effectively interact with these complex systems. At JPL, he continues to work on multi-agent robotics and distributed systems for new and challenging applications, including CADRE (Cooperative Autonomous Distributed Robotic Exploration), a lunar technology demonstration of multi-agent rover autonomy, and fault tolerant, distributed time agreement.
Aaron Frank
Senior Director, C5ISR Product Management, Curtiss Wright
Aaron Frank joined Curtiss-Wright in January 2010. As the Sr Director of the Product Management team, he is responsible for a wide range of COTS products utilizing advanced processing, video graphics/GPU and network switching technologies in many industry-standard module formats (VME, VPX, etc.). His focus includes product development and marketing strategies, technology roadmaps, and being a subject matter expert to the sales team and with customers. Aaron has a Bachelor of Science in Electrical Engineering degree from the University of Waterloo.
Tao Lang
Product Marketing Manager, MicroChip
Tao Lang is a Product Marketing Manager at Microchip Technology, focused on strategic and technical marketing, product management, and business development for high-performance computing, high-speed connectivity, and networking IC products and technologies. With more than 30 years of experience in the semiconductor industry, Tao brings deep expertise across a broad range of markets and applications. Most recently, Tao has served as Vice President of the Avnu Alliance, with a focus on advancing TSN, IEEE 802.1DP, and related technologies for aerospace and defense applications.
Vlad Lyalikov
MICROCHIP
Vlad Lyalikov is a Software Manager in Microchip Technology’s NCS division.
He started at SMSC in 2007 and joined Microchip through the 2012 acquisition, focusing on Time-Sensitive Networking since 2017 and contributing to the Avnu Alliance’s automotive work.
Sandeep Menon
BAE
Brijesh Patel
Technical Lead, PeopleTec, supporting Redstone Test Center
Brijesh Patel is a Technical Lead in Modeling & Simulation (M&S) at PeopleTec, where he leads the development of a Hardware-in-the-Loop (HWIL) System Integration Lab (SIL) for Redstone Test Center (RTC). Funded by the Test Resource Management Center (TRMC), this SIL addresses critical T&E capability gaps in evaluating Time Sensitive Networking (TSN)-based Data Distribution Systems (DDS) across Army platforms. Brijesh oversees software architecture for simulating avionics messages, integrating real Line Replaceable Units (LRUs), developing analysis tools for TSN QoS validation, and initiating IV&V for system architecture and component testing. Brijesh holds a Master of Science in Aerospace Systems Engineering from the University of Alabama in Huntsville. His prior experience spans computational analysis, radar systems modeling, and fire control algorithm development for defense applications.
Jorge Sánchez-Garrido
Safran Electronics & Defense Spain SLU
Jorge Sánchez-Garrido holds a Ph.D. in Communication Technologies (2021) from the University of Granada (Spain). He is a Technical Lead at Safran Electronics and Defense Spain, where he specializes in FPGA architecture, time-sensitive networking (TSN), and White Rabbit (WR) timing. He has contributed to the avionics of the Miura-1, a pioneering application of TSN for aerospace, and to the design of high-performance TSN switches. In addition, his interests include network management platforms, the use of high-accuracy synchronization and deterministic networks to implement the control plane of quantum communications, quantum computing, and to support the machine-protection system of high-energy physics facilities.
Daniel Uribe
Principal Product Owner
Daniel Uribe is the Product Owner at SOC-E (System-on-Chip engineering), where he leads the strategy and management of the company’s product portfolio. In this role, he is responsible for aligning product development with customer needs and market trends, ensuring that SOC-E’s cutting-edge solutions remain at the forefront of the industry.
He holds a degree in Engineering in Telecommunication Technology and a Master’s in Advanced Electronic Systems from the University of the Basque Country – UPV/EHU. Before transitioning into product management, Daniel worked as a Software Manager at SOC-E, focusing on the analysis, design, and development of embedded software for the company’s products.
With a strong technical foundation and deep expertise in Time-Sensitive Networking (TSN) technologies, Daniel combines engineering knowledge with product leadership to drive innovation and deliver high-value solutions to customers across critical sectors.
Sarat Varanasi
GE